New answers tagged

2

It has been commented on that your questions could be asnwered better by the Labcenter company that sells Proteus. You do however raise an issue encountered but many PIC users. That is the Read-Modify-Write (RMW) problem on output bits using the bit set and clear opcodes. Most older 8-bit PIC16F controllers have this issue. It has been addressed on the ...


1

Sorry to point this out, but it seems that you are using the Matlab notation and have not even looked at the Scilab language reference, still, clc; clear all; xdel(winsid()) A=[-1 -2;42 -0.9] B=[1.5;1.1] C=[0.7 2.1] D=[0] H=syslin('c',A,B,C,D) H=ss2tf(H) figure t=0:0.05:5; plot(t,csim('step',t,H)) xgrid(2)


1

Everyone has their own preferred simulation tool depending on what their background is and what they are simulating most often. You can get Almost all simulation tools to simulate any circuit(within reason) some just are a little easier in some scenarios. I would suggest you look at what simulation software the people around you or the people that you are ...


0

In LTSPICE XVII(64) this seems to work... Noise output is about 0.9nV/rt(Hz) as expected: Perhaps the 129fV/rt(Hz) is a result of an added Thevenin resistance added to the voltage source??


1

You should use {Rg} as value for R1, so without the R=. Using the plain value 1u or R={1k} also gives 129 fV/Hz½. I've no idea what makes the evaluation of R={1k} or R={Rg} to become 1uΩ


0

The original SPICE program was written in Fortran and thus really only wanted to see uppercase letters inside the model lines ... and I recall PSPICE allowed net names to be a mix of upper and lowercase letters, which was quite handy. PSPICE has some advanced models, but most of the ones you will find for discretes are 'low-tech' models and thus no issue in ...


1

I think CircuitLab doesn't simulate the power draw by the opamp (neither for the output, nor for the quiescent current needed by the IC innards). The reason for this, I guess, is that LM324 is a jellybean part, made by a handful of manufacturers, so if you truly want to simulate, you would need to specify exact part number and manufacturer, not just "LM324"....


1

Try this instead Notice there are 2 stages of latches to make the clock edge sensitive.


0

As multiple commenters suggested, because ram_dat is inout, it can (but must not) be driven at the same time by your module and the system instantiating your module. Make sure you understand how your protocol guarantees absence of multiple drivers (by switching to Z when not in the "driving seat"), and verify that both "outside" and "inside" of the module ...


Top 50 recent answers are included