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8

You must control the applicable enable pin of the Si8641. If you examine the truth table in the Si8641 data sheet, you will see that the only situations where the output is High-Z are those where the governing enable input is low. It would appear that EN1 governs A4 which you are using for MISO, while EN2 governs the other channels which you are using in the ...


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I was running into a similar issue and after days of research and debugging, I noticed a trend that everyone who was having this issue configured their SPI as RX only. When I changed my SPI to TX RX mode the issue was magically solved. I'm not sure what could cause this, but it seems like a bug on ST's end, either as part of the HAL library, or as part of ...


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ADXL345 Datasheet. The most interesting section is on the FIFO. See page 21: The ADXL345 contains technology for an embedded memory management system with 32-level FIFO that can be used to minimize host processor burden. This buffer has four modes: bypass, FIFO, stream, and trigger (see FIFO Modes) It sounds like you should set the FIFO mode to "...


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If the SPI chip select signal is low throughout all of the transfers then the LSM6DS3 device will behave as if you are performing a multibyte read (see Figure 10 in the datasheet). The initial read of the WHO_AM_I register starts the read and the read will continue with subsequent registers while the chip select is low. The chip select signal must go high ...


2

I found the fix for this. In CubeMX (SPI configuration) there is an option called "Master Keep IO State", by default it is disabled. Enabling it fixed the floating levels of CLK/MOSI and the sensor is no longer getting triggered by randoms levels on CLK/MOSI. I am now left with switching issues, which are beyond the scope of that question. ...


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According to the datasheet (assuming you're right about the W25Q), these are the Chip Select and data out pins. So, you're right, on their own, probably not useful. Might still be an important test point where the ability of a controller to initialize itself and read identification from the flash might be tested. Also, note that this might be something that'...


1

3.6V Family Logic were typically 22 +/-50% typ Ohm driver impedance so 33R series parts are used for 50 Ohm bus, given tolerances on source. The FT813 datasheet indicates on p49 of 63, for VccIO=3.3, Rsw = 6 Ω typ, 10 Ω max, thus twice this for differential. 220R is not needed for short cct protection. Rather you choose according to cable type. Std. ...


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The solution was changing SPI1 -> I2SCFGR |= SPI_I2SCFGR_I2SCFG_MASTER_TRANSMIT; to SPI1 -> I2SCFGR |= SPI_I2SCFGR_I2SCFG_MASTER_FULL_DUPLEX


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I know it's been quite old but, I come across the same situation when I use MPU9250 spi with long wire, and read Ak8963 by the MPU9250 Aux I2C. Oscilloscope on SPI SCLK and Aux SCL shows that when there is a SPI reading and I2C reading happen at the same time, the I2C would hang and halt, I can see crosstalk spikes on I2C signal whenever there is SPI CLK ...


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