In the semiconductor and electronic design industry, SystemVerilog is a combined hardware description language and hardware verification language based on extensions to Verilog.

In the semiconductor and electronic design industry, SystemVerilog is a combined hardware description language and hardware verification language based on extensions to Verilog.

It is defined by IEEE 1800-2012 and with the exception of some keywords, is a backwards-compatible superset of , IEEE 1364-2005.

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