New answers tagged ttl
1
What will be the output voltage levels?
The first thing to do is choose Vdd, which for most designs is 3.3V (you can choose Vdd to be anything that is within the processors operational ratings in the datasheet)
Then you need to figure out what the load current will be on the GPIO of the STM32 (should not be more than 8mA sourcing and 20mA sinking there are ...
0
The schematic is incorrect. For the circuit to produce a positive-going pulse when the optical sensor is illuminated, transistor Q3 must be a PNP (or p-channel) type. With that change, it looks like it should work as described.
The noise bursts occur at 10 ms intervals, indicating a 50 Hz power system. They could be coming from anything plugged into the ...
2
Yes, there is a lot of wisdom here; "current steering" is such a wisdom. But what is this?
Input LOW. When the input A/B is LOW (grounded), the base current of the input transistor is completely diverted (steered) through its forward-biased base-emitter junction although the base-collector junction is also forward biased. Why?
In this arrangement, ...
4
In TTL logic, the input transistor works in a manner similar to the two diodes in your DTL inverter. If the input, (emitter) is high, current will flow from the base through the collector. If the emitter is low, current will not flow out of the collector. Unlike most uses of a transistor, this use in not particularly related to amplification. It replaced the ...
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