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6

Welcome to the wonderful world of FPGA simulation. Yes, simulations take a long time. Running for a full second is a lot of simulation. One trick you can do is speed up your blink rate just for the purpose of simulation, say to 100 Hz. Then you'll be able to verify your code oscillates correctly in a mere 10ms simulation. Once it works, change back to 1Hz ...


5

F = 200 MHz or T = 5 ns is the fastest clock in your design and it looks like you don't have any events in your design to be captured at 100 ps precision. You can run simulation with a precision of 500 ps instead of 100 ps, since your Test bench needs to drive clock edges at 2.5 ns. This may speed up the simulation. But the difference may not be noticeable ...


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