Electrical Engineering
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Eggi's user avatar
Eggi's user avatar
Eggi
  • Member for 7 years, 4 months
  • Last seen more than a month ago
  • Austria
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All Questions Answers
Score Newest
question
9
DDR3 Data Errors
Aug 1, 2019
question
3
Capacitive load - Circuit protection
Sep 3, 2019
answer
3
how to Design Rule Check an Eagle file in a git hook?
Jul 28, 2016
question
2
LTSpice Simulation - How to design a non ideal voltage source and limit its current?
Oct 14, 2019
question
2
Capacitor measurement in existing circuit
Feb 3, 2020
question
1
Measuring >40VAC from 230VAC Phase against air
Feb 6, 2020
answer
1
Configure (upload bitstream) to MAX10 without Altera tools using Linux
Aug 3, 2016
question
0
Intel max 10 dimensions - datasheet & BSDL mismatch
Aug 28, 2018
question
0
DDR3 RAM - possible Row Hammer
Aug 22, 2019
question
0
LCR meter defect - preventive actions
Feb 5, 2020

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