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21 votes

3 answers

27k views

How should I understand the intrinsic body diode inside a MOSFET?

asked Aug 5, 2018 at 3:09

6 votes

1 answer

6k views

The SERDES/transceiver design inside the Ethernet MAC controller

asked Nov 14, 2019 at 8:22

6 votes

1 answer

480 views

What's the purpose of the components shown in this circuits?

asked Nov 18, 2016 at 17:39

5 votes

1 answer

2k views

A few questions about the application of ethernet controller and PHY chip and SFP module

asked Oct 31, 2019 at 14:48

3 votes

1 answer

5k views

PCIe link training

asked May 18, 2017 at 8:34

3 votes

1 answer

473 views

Is there a rule for DDR4 CA signals reference plane?

asked Dec 24, 2017 at 6:24

2 votes

1 answer

2k views

DDR4 differential pair routing guideline

asked Aug 28, 2017 at 13:25

2 votes

2 answers

4k views

What's the standard procedure of DDR4 training?

asked Apr 25, 2017 at 16:23

2 votes

0 answers

471 views

SATA compliance test

asked Dec 11, 2016 at 16:05

1 vote

1 answer

7k views

Where should I place the series termination resistor for AVSBus?

asked Dec 18, 2016 at 9:58

1 vote

2 answers

5k views

How SPI and I2C latch data?

asked Feb 13, 2017 at 6:51

1 vote

2 answers

8k views

Input leakage current

asked Aug 24, 2017 at 12:56

1 vote

1 answer

530 views

Bus isolation circuit

asked Jun 20, 2017 at 12:58

1 vote

2 answers

3k views

How do I understand the effect when the load current is over the inductor's saturation current?

asked Jul 21, 2018 at 10:07

0 votes

1 answer

2k views

AC coupling caps on USB interface [duplicate]

asked Oct 21, 2017 at 1:41

0 votes

1 answer

401 views

Anyone knows how X86 platform set the PCIe bifurcation at boot up?

asked Aug 19, 2017 at 3:34

0 votes

1 answer

372 views

Compliance test mode in Gen1/2 and Gen3

asked Dec 11, 2016 at 16:46

0 votes

1 answer

3k views

UART signals connected to RJ45 connector?

asked Nov 22, 2016 at 13:45

0 votes

1 answer

905 views

Question about VHDL instantiation

asked Nov 24, 2016 at 12:49

0 votes

2 answers

567 views

Is this the full-bridge DC-DC converter topology? What's the benefits of iso/non-iso topology?

asked Nov 25, 2016 at 8:08

0 votes

1 answer

883 views

IN/OUT pin of the crystal circuits [duplicate]

asked Sep 1, 2018 at 13:45

Stack Exchange Network

21 Questions

How should I understand the intrinsic body diode inside a MOSFET?

The SERDES/transceiver design inside the Ethernet MAC controller

What's the purpose of the components shown in this circuits?

A few questions about the application of ethernet controller and PHY chip and SFP module

PCIe link training

Is there a rule for DDR4 CA signals reference plane?

DDR4 differential pair routing guideline

What's the standard procedure of DDR4 training?

SATA compliance test

Where should I place the series termination resistor for AVSBus?

How SPI and I2C latch data?

Input leakage current

Bus isolation circuit

How do I understand the effect when the load current is over the inductor's saturation current?

AC coupling caps on USB interface [duplicate]

Anyone knows how X86 platform set the PCIe bifurcation at boot up?

Compliance test mode in Gen1/2 and Gen3

UART signals connected to RJ45 connector?

Question about VHDL instantiation

Is this the full-bridge DC-DC converter topology? What's the benefits of iso/non-iso topology?

IN/OUT pin of the crystal circuits [duplicate]