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Kevin Kruse's user avatar
Kevin Kruse's user avatar
Kevin Kruse's user avatar
Kevin Kruse
  • Member for 7 years
  • Last seen more than a month ago
5 votes
Accepted

LVDS_25 voltage range

4 votes
Accepted

Problem with SPI wiring?

4 votes
Accepted

How to connect the PHY crystal for RMII?

4 votes
Accepted

How to declare register values as an input in Verilog?

4 votes
Accepted

Why are both a voltage regulator and 2 MOSFETs used for a 3-5V to 3.3V circuit?

3 votes

Grounding Vcc and Vee?

3 votes
Accepted

How can a processing delay be explicitly declared in VHDL?

2 votes
Accepted

What happens when there is a simultaneous Read and Write launched to the same address in AXI3/4?

2 votes

Implementing Bellman-Ford algorithm on finite state machine

2 votes
Accepted

SPI programming flash chip(s) - connecting HOLD and WP pins

2 votes
Accepted

Understanding Ports on DAC

2 votes
Accepted

Error Amplifier Gain

2 votes
Accepted

VHDL initialize vector using readable integers not long binary string

2 votes
Accepted

INA219 measure voltage of battery with RPi

2 votes
Accepted

Confusion about inductors in series vs. combined

1 vote

How to wire a 8-directional switch (Alps RKJXW)

1 vote
Accepted

TL866 programmer schematic question

1 vote
Accepted

Debugging Gate-level Verilog Multiplexer

1 vote

Implementing a 4-bit ripple carry adder/subtractor using structural VHDL

0 votes
Accepted

PCB - Ram connectors problem

0 votes

Makeshift SMT Station. Any suggestions?

-1 votes

ALU Design in verilog HDL