stanri

Member for 11 years, 1 month
Last seen more than a week ago

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Answers

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Score Activity Newest

47

Why aren't FPGAs ubiquitous?

Sep 13, 2015

26

How do you pronounce the following set of 'words'?

Feb 13, 2013

23

n bit shift register (Serial Out) in VHDL

Feb 4, 2013

20

How to divide 50MHz down to 2Hz in VHDL on Xilinx FPGA

Mar 19, 2013

16

How do you document your hardware design decisions?

Feb 9, 2015

Questions

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18

Is it possible to have too much decoupling?

Jan 11, 2013

14

FPGA firmware design: How big is too big?

Dec 31, 2012

9

Schematic Critique: Phy interface with RJ45/Magnetics

Jan 10, 2013

9

What is the function of this choke-like transformer on the PCB side of this RJ45 jack+magnetics connector?

Jun 6, 2013

9

What would cause this kind of amplitude interference on my ADC recording?

Apr 6, 2018

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vhdl

114

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fpga

111

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27

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microcontroller

71

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4

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verilog

35

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16

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digital-logic

35

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7

posts

Reputation

+10

VHDL: Architecture naming and interpretation

+10

Using Digital Clock Manager with Verilog to generate 25Mhz clock from 32Mhz internal clock

+10

other uses of soft core in fpga applications?

+10

Is it possible to drive a net from two processes when the assignments are conditionally mutually exclusive?

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Dec 21, 2019
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