User Mitu Raj

18 votes

Accepted

Setup and hold time output when violated

answered Dec 31, 2017 at 13:51

13 votes

Why is the efficiency of a half wave rectifier equal to 40.6% and not 50%?

answered Nov 13, 2020 at 21:35

13 votes

Is this an AC or DC signal?

answered Mar 16, 2021 at 3:56

12 votes

How do resistors limit current for an LED?

answered Dec 20, 2017 at 17:40

11 votes

Can a 220V relay be used to switch 110V appliances?

answered Dec 7, 2017 at 16:38

11 votes

Power and bulbs

answered Nov 6, 2017 at 14:47

11 votes

Accepted

What is the purpose of a master-slave flip-flop?

answered Jan 22, 2018 at 17:47

9 votes

Getting the energy consumption in joules over a period when having current and voltage

answered Jul 22, 2021 at 7:35

9 votes

Purpose of 2 serial resistors on voltage divider

answered Jan 19, 2018 at 12:57

8 votes

What is the voltage drop across the 10 ohm resistor?

answered Oct 30, 2020 at 18:02

8 votes

Can always @ (*) introduce randomness in FPGA?

answered Jun 10, 2021 at 5:37

6 votes

ARM Assembly Code

answered Aug 10, 2021 at 5:45

6 votes

Synthesis rules for this procedural assignment (combinational circuit)

answered Aug 14, 2021 at 6:27

6 votes

Accepted

Microcontroller IO pin configuration I2C

answered May 20, 2021 at 16:39

6 votes

How to write scalable VHDL code

answered Dec 12, 2020 at 14:52

6 votes

What is the power / energy of a discrete time constant signal?

answered Apr 10, 2018 at 18:22

6 votes

Accepted

Op-amps circuit with diodes

answered Apr 14, 2018 at 19:21

6 votes

Accepted

How to switch a MOSFET to drive a 5v relay from Raspberry pi?

answered May 8, 2018 at 6:00

6 votes

Mass-Action Law of Semiconductors

answered Jan 28, 2018 at 10:33

6 votes

Accepted

Cyclone V data corruption at high frequency

answered Dec 24, 2017 at 8:34

5 votes

Accepted

Is it a good practice to put assertion statements into VHDL RTL code to aid in simulation?

answered Jul 15, 2021 at 18:59

5 votes

Vivado Simulation Running Very Slow

answered Oct 16, 2021 at 6:05

5 votes

Accepted

Why are two transmission used gates to make a D Latch?

answered Dec 18, 2017 at 18:45

5 votes

Operating speed of BJT and MOSFET

answered Nov 21, 2017 at 12:18

5 votes

Associating ROMs and RAMs

answered Jan 9, 2018 at 19:34

5 votes

void loop executes even when the while loop inside is true in arduino

answered May 7, 2018 at 10:06

5 votes

Accepted

Logisim Help - Using Custom D Flip Flop

answered Nov 18, 2020 at 17:31

5 votes

Accepted

Combinational loop in Verilog/SystemVerilog

answered Dec 3, 2019 at 5:56

5 votes

Accepted

What is standard coding practice for a non-blocking assignment to a large register array with variable part select in Verilog?

answered Mar 3, 2021 at 4:31

5 votes

Accepted

Problem mapping VHDL onto development board

answered Dec 19, 2020 at 20:17

Stack Exchange Network

357 Answers

Setup and hold time output when violated

Why is the efficiency of a half wave rectifier equal to 40.6% and not 50%?

Is this an AC or DC signal?

How do resistors limit current for an LED?

Can a 220V relay be used to switch 110V appliances?

Power and bulbs

What is the purpose of a master-slave flip-flop?

Getting the energy consumption in joules over a period when having current and voltage

Purpose of 2 serial resistors on voltage divider

What is the voltage drop across the 10 ohm resistor?

Can always @ (*) introduce randomness in FPGA?

ARM Assembly Code

Synthesis rules for this procedural assignment (combinational circuit)

Microcontroller IO pin configuration I2C

How to write scalable VHDL code

What is the power / energy of a discrete time constant signal?

Op-amps circuit with diodes

How to switch a MOSFET to drive a 5v relay from Raspberry pi?

Mass-Action Law of Semiconductors

Cyclone V data corruption at high frequency

Is it a good practice to put assertion statements into VHDL RTL code to aid in simulation?

Vivado Simulation Running Very Slow

Why are two transmission used gates to make a D Latch?

Operating speed of BJT and MOSFET

Associating ROMs and RAMs

void loop executes even when the while loop inside is true in arduino

Logisim Help - Using Custom D Flip Flop

Combinational loop in Verilog/SystemVerilog

What is standard coding practice for a non-blocking assignment to a large register array with variable part select in Verilog?

Problem mapping VHDL onto development board