Electrical Engineering
Martin Thompson's user avatar
Martin Thompson's user avatar
Martin Thompson's user avatar
Martin Thompson
  • Member for 13 years, 5 months
  • Last seen more than a week ago
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About

Electronic engineer by training, hacker (in the old-fashioned sense) by inclination. Particularly good with embedded software and FPGAs. Now doing cybersecurity.

I'm currently an engineer at ZF Race Engineering. Despite the name this group does much more than just motorsport: I work in the Product Cybersecurity group.

All opinions expressed here are my own, not necessarily ZF's. And possibly not even mine if I'm playing devil's advocate.

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Top posts
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All Questions Answers
Score Newest
answer
77
VHDL vs. Verilog
Jul 14, 2011
answer
33
Good tools for drawing schematics
May 6, 2010
answer
18
VHDL: Component vs Entity
Jul 12, 2011
answer
17
VHDL: Converting from an INTEGER type to a STD_LOGIC_VECTOR
Nov 17, 2010
answer
17
VHDL: integers for synthesis?
Mar 21, 2011
answer
16
Protection against automotive power supply hazards
Jul 20, 2011
answer
14
Transmission of different messages with the SAME ID on a CAN bus
Oct 9, 2012
answer
13
VHDL: Using '*' operator when implementing multipliers in design
Sep 17, 2014
answer
12
What exactly is "dominant" and "recessive"?
May 28, 2014
question
11
When is it neater to use VECTOR representations vs INTEGERs?
Mar 12, 2012
Top Meta posts
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3
Should we allow legal questions, specifically questions about export restrictions in the US?
Top network posts
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43
Clarification on Ethernet, MII, SGMII, RGMII and PHY
38
VHDL - How should I create a clock in a testbench?
33
Reverse bit order on VHDL
31
shift a std_logic_vector of n bit to right or left
30
Experiences with Test Driven Development (TDD) for logic (chip) design in Verilog or VHDL

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