User Sittin Hawk - Electrical Engineering Stack Exchange

Sittin Hawk

Member for 2 years, 6 months
Last seen this week

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448

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6

answers

27

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2

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Yearling

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Nov 24

10

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Curious

Apr 16, 2020
Caucus

Feb 15, 2021
Commentator

Jul 1, 2020

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vhdl

4

Score

4

Posts

12

Posts %

fpga

1

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4

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12

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digital-logic

1

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2

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6

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fcc

0

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3

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9

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transistors

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3

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9

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All Questions Answers

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5

negative miller capacitance

Jan 18, 2020

4

Attach output to a state in Finite State Machine in VHDL

Nov 30, 2019

3

Impedance/Termination of Marvell PHY

Oct 5, 2020

2

MOSFET N-Channel voltage follower near gate threshold

Aug 12, 2021

2

what is the most difficult part of creating a DDR2 or DDR3 memory controller inside an FPGA?

Oct 5, 2020

2

BJT high frequency analysis

Jan 19, 2020

2

Application of set_clock_latency

Apr 10, 2020

2

Clock generation on FPGA pin

Apr 21, 2020

2

SFP+ 10GbE Module Interface

Jun 30, 2020

1

DG flip-flop behavior?

Dec 12, 2020

Top network posts

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21

Can the US House/Congress impeach/convict a private citizen that hasn't held office?

16

Turn off hot water without hot water valve

5

Did the vet cut my dog's nails too short?