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LUFER
  • Member for 4 years
  • Last seen more than a week ago
19 votes
4 answers
15k views

Why does 1/4 wavelength have a ground plane and 1/2 wavelength needs none?

3 votes
2 answers
576 views

Why is CVD not used in the manufacture of NMOS gate oxides?

2 votes
3 answers
748 views

How to simulate digital logic using CMOS technology (MOSFET) in Proteus?

1 vote
1 answer
173 views

UWB circular antenna: input impedance (Zo= 50 Ω)

1 vote
0 answers
111 views

Cadence simulation graph versus time

0 votes
1 answer
273 views

CADENCE wireless connection

0 votes
1 answer
131 views

Cadence - Schematic vs Layout

0 votes
1 answer
32 views

Processing the signals generated by the sensor at the expense of sensitivity / selectivity

0 votes
0 answers
47 views

(cantilever) gas sensor with MOS technology - How does it work?

0 votes
2 answers
269 views

How to understand Bode plot or Bode diagram

0 votes
1 answer
128 views

triac optocoupler with dual output

0 votes
1 answer
51 views

LED Driver - Luminaire still lights up

0 votes
0 answers
59 views

What is Electromagnetic Cross Section?

0 votes
1 answer
80 views

Transconductance photodiode?

0 votes
0 answers
48 views

PIN diode - what setting to detect the frequency?

0 votes
1 answer
55 views

What is the correct CMOS setting?

0 votes
0 answers
81 views

How to find maximum output current of a CMOS inverter?

0 votes
0 answers
319 views

Proteus - Simulation of capacitor discharge

0 votes
0 answers
36 views

Porous silicon simulator

-1 votes
2 answers
202 views

CADENCE: layout error