User Wanderer

3 votes

0 answers

80 views

How can I design two CMOS ring oscillators so that I can observe sub harmonic injection locking?

asked Jul 21, 2023 at 5:22

2 votes

3 answers

679 views

I need to implement DC and transient analysis of diode and transistor circuits. How can I do that?

asked Jul 3, 2021 at 13:00

2 votes

3 answers

1k views

Frequency of square wave generated by Wien bridge oscillator

asked Feb 14, 2022 at 1:29

2 votes

2 answers

216 views

Where is the body terminal of a FinFET connected usually in digital circuits and in analog circuits?

asked Jan 19 at 1:04

2 votes

2 answers

659 views

Can a 2N7000 transistor withstand 4.7-5 V gate voltage?

asked Feb 15 at 3:51

1 vote

0 answers

31 views

What happens when two same type semiconductiors are joined togehther?

asked Apr 1, 2023 at 10:09

1 vote

0 answers

61 views

What happens to a PN junction diode and its depletion width if forward bias voltage is greater than built-in voltage?

asked Apr 3, 2023 at 13:45

1 vote

2 answers

58 views

How to be sure that the SPICE simulation results are the exact results I will get when I build the circuit (especially an ASIC) in real?

asked May 11 at 3:30

0 votes

0 answers

55 views

What is the practical value of the 'scale' parameter in Hspice '.trannoise' command?

asked Jan 19 at 15:46

0 votes

1 answer

89 views

How much current can the X9C103/X9C103S digital potentiometer handle?

asked Feb 13 at 11:36

0 votes

0 answers

37 views

Can the gate length of transistor be varied to arbitrary but reasonable values in any technology node?

asked Feb 18 at 15:59

0 votes

2 answers

73 views

How to implement an automatic and continuous variable load across a solar cell to obtain its I-V characteristics?

asked Feb 19 at 15:58

0 votes

1 answer

47 views

How useful will the skills of analog circuit design be for researching in non-conventional computing? [closed]

asked Apr 27 at 18:31

0 votes

0 answers

66 views

How is a fault location detected in a power system?

asked Sep 13, 2022 at 18:02

0 votes

1 answer

495 views

In the PNP transistor, base current is the sum of emitter and collector current. How is this possible?

asked Jul 6, 2021 at 17:22

0 votes

1 answer

252 views

Can I use esp32 instead of arduino for the project I have described?

asked Jul 26, 2023 at 10:37

0 votes

1 answer

71 views

When working with a technology node (say 14nm), should I keep the gate lengths of the FETs strictly equal to the minimum gate length?

asked Dec 14, 2023 at 13:02

0 votes

0 answers

332 views

How to simulate noise in transient analysis of HSPICE?

asked Jan 14 at 19:07

0 votes

0 answers

25 views

Can I set the channel-length of a FinFET to values very much larger than the minimum(or maximum) gate-length provided by the technology node?

asked Jan 17 at 16:39

Stack Exchange Network

19 Questions

How can I design two CMOS ring oscillators so that I can observe sub harmonic injection locking?

I need to implement DC and transient analysis of diode and transistor circuits. How can I do that?

Frequency of square wave generated by Wien bridge oscillator

Where is the body terminal of a FinFET connected usually in digital circuits and in analog circuits?

Can a 2N7000 transistor withstand 4.7-5 V gate voltage?

What happens when two same type semiconductiors are joined togehther?

What happens to a PN junction diode and its depletion width if forward bias voltage is greater than built-in voltage?

How to be sure that the SPICE simulation results are the exact results I will get when I build the circuit (especially an ASIC) in real?

What is the practical value of the 'scale' parameter in Hspice '.trannoise' command?

How much current can the X9C103/X9C103S digital potentiometer handle?

Can the gate length of transistor be varied to arbitrary but reasonable values in any technology node?

How to implement an automatic and continuous variable load across a solar cell to obtain its I-V characteristics?

How useful will the skills of analog circuit design be for researching in non-conventional computing? [closed]

How is a fault location detected in a power system?

In the PNP transistor, base current is the sum of emitter and collector current. How is this possible?

Can I use esp32 instead of arduino for the project I have described?

When working with a technology node (say 14nm), should I keep the gate lengths of the FETs strictly equal to the minimum gate length?

How to simulate noise in transient analysis of HSPICE?

Can I set the channel-length of a FinFET to values very much larger than the minimum(or maximum) gate-length provided by the technology node?