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Nazar
  • Member for 8 years, 7 months
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19 votes
3 answers
15k views

"two bypass/decoupling capacitors" rule?

18 votes
6 answers
36k views

Ferrite bead position

9 votes
1 answer
2k views

Soldering BGA components DIY

8 votes
4 answers
4k views

Storing batteries in a refrigerator

6 votes
1 answer
746 views

Can a CPLD be reprogrammed just like a Microcontroller?

6 votes
2 answers
7k views

Voltage regulator vs. voltage controller

6 votes
2 answers
3k views

Inductor selection for obtaining a noiseless analog power rail

5 votes
2 answers
937 views

Understanding optical parameters of image sensors

5 votes
2 answers
702 views

Rail-to-rail oscillations in subtractor op amp circuit

5 votes
2 answers
4k views

Power origin and power planes placement on PCB

4 votes
4 answers
13k views

How to make a solder paste more liquid-like

4 votes
3 answers
2k views

Fighting overshoots/undershoots using ferrite beads does not help?

4 votes
2 answers
379 views

Voltage shifter distorts signal

4 votes
2 answers
370 views

Noise at 2^n transitions

4 votes
2 answers
4k views

Consequences of mixing lead and lead-free alloys when soldering

4 votes
1 answer
7k views

Why need to declare output as a register in verilog

3 votes
1 answer
720 views

How to "Pull Down" LVDS input in FPGA

3 votes
2 answers
1k views

Image Sensor sensitivity

3 votes
1 answer
3k views

The timing-driven placement phase encountered an error

3 votes
3 answers
4k views

How a zener and a schottky diodes protect laser diode?

3 votes
4 answers
3k views

Unknown source of noise when measuring with oscilloscope

3 votes
2 answers
2k views

Can not keep pin LOW during FPGA configuration

3 votes
1 answer
4k views

Bypass/decoupling capacitor type choice [duplicate]

3 votes
1 answer
176 views

IO voltage properties in CPLD

2 votes
2 answers
726 views

OpAmp configuration with gain less than 1

2 votes
2 answers
2k views

Consequences of not following reflow profile

2 votes
3 answers
555 views

OpAmp I/O range determination from a datasheet

2 votes
1 answer
502 views

Rise/fall time constrains for ADC?

2 votes
1 answer
248 views

Use counter's output to reset itself

2 votes
2 answers
491 views

CPLD: my first project