User sarthak

9 votes

3 answers

24k views

Procedural blocks in verilog

asked Aug 1, 2014 at 9:55

6 votes

2 answers

4k views

Difference between HVL and HDL

asked Jul 31, 2014 at 15:20

5 votes

1 answer

668 views

Effect of zeroes in system stability

asked Dec 14, 2014 at 19:41

4 votes

2 answers

16k views

Region of Operation of MOSFET and current cutoff frequency

asked Jan 10, 2015 at 12:00

3 votes

2 answers

6k views

What is Pipeline Flushing in microprocessors

asked Feb 11, 2015 at 18:20

3 votes

1 answer

783 views

Determination of System poles through open/short circuit time constant technique

asked Dec 15, 2015 at 10:11

3 votes

4 answers

10k views

Stability and loop gain of negative feedback systems

asked Nov 23, 2014 at 13:35

2 votes

2 answers

663 views

Delay and Stablity in Negative Feedback Systems: Confusion

asked Dec 1, 2015 at 15:32

2 votes

1 answer

96 views

Digital filter implementation

asked Sep 21, 2014 at 10:30

1 vote

1 answer

1k views

definition of input/output resistance of a circuit

asked Oct 18, 2014 at 8:06

1 vote

2 answers

15k views

Steady state response and transfer function

asked Dec 30, 2014 at 17:00

1 vote

1 answer

2k views

contribution statements in verilog-A

asked Jul 4, 2014 at 9:30

1 vote

4 answers

3k views

Is Micro-processor completely Digital?

asked Aug 16, 2014 at 2:49

1 vote

3 answers

424 views

Delay and Stablity in Negative Feedback Systems: Confusion-2

asked Dec 4, 2015 at 13:47

1 vote

2 answers

484 views

Resolution gain in Delta-Sigma Converters

asked Aug 31, 2015 at 16:29

1 vote

1 answer

358 views

Delta Sigma Converters: Resolution

asked Sep 1, 2015 at 5:37

1 vote

1 answer

78 views

Resolution of Oversampling Converters

asked Sep 2, 2015 at 12:54

0 votes

1 answer

722 views

Frequency Modulated Continuous Wave Radar: Basic Confusion

asked Nov 7, 2015 at 7:23

0 votes

1 answer

1k views

Event Driven Simulation: Confusion

asked Nov 24, 2015 at 11:30

0 votes

2 answers

249 views

Low Pass filtering in Delta Sigma modulation

asked Jun 28, 2015 at 9:30

0 votes

1 answer

133 views

Hardware Implementation of Discrete time Systems

asked Sep 21, 2014 at 4:51

0 votes

1 answer

525 views

Confusion: Lock range of PLL

asked Jan 5, 2016 at 10:01

0 votes

2 answers

1k views

Phase Locked Loop: Confusion in Lock Range

asked Jan 8, 2016 at 7:46

Stack Exchange Network

23 Questions

Procedural blocks in verilog

Difference between HVL and HDL

Effect of zeroes in system stability

Region of Operation of MOSFET and current cutoff frequency

What is Pipeline Flushing in microprocessors

Determination of System poles through open/short circuit time constant technique

Stability and loop gain of negative feedback systems

Delay and Stablity in Negative Feedback Systems: Confusion

Digital filter implementation

definition of input/output resistance of a circuit

Steady state response and transfer function

contribution statements in verilog-A

Is Micro-processor completely Digital?

Delay and Stablity in Negative Feedback Systems: Confusion-2

Resolution gain in Delta-Sigma Converters

Delta Sigma Converters: Resolution

Resolution of Oversampling Converters

Frequency Modulated Continuous Wave Radar: Basic Confusion

Event Driven Simulation: Confusion

Low Pass filtering in Delta Sigma modulation

Hardware Implementation of Discrete time Systems

Confusion: Lock range of PLL

Phase Locked Loop: Confusion in Lock Range