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Daniel B.
  • Member for 11 years, 1 month
  • Last seen more than a week ago
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3 votes
1 answer
24k views

Efficient way of setting bits in verilog

3 votes
1 answer
1k views

How can I pass a 10 bit value to a module that needs a 12 bit input in verilog?

2 votes
1 answer
507 views

Difference between implementations of a 4 bit counter in verilog

2 votes
1 answer
132 views

Does it make sense to plot resistor current vs input voltage in this circuit?

2 votes
1 answer
3k views

What component should I use to represent a solenoid valve in multisim

2 votes
2 answers
386 views

How to completely turn off device when float switch is open

1 vote
1 answer
724 views

Multisim producing very low comparator output voltage

1 vote
1 answer
230 views

What does a shift in time domain do to the phase in frequency domain?

1 vote
6 answers
6k views

Difficulty solving op amp problem

1 vote
1 answer
1k views

Understanding solution to op amp in first order circuit

1 vote
2 answers
789 views

How does a capacitive receiver work for a fox and hound set?

1 vote
1 answer
184 views

What type of transformer is this?

1 vote
2 answers
109 views

Trouble solving for voltage gain

0 votes
1 answer
794 views

Rated current vs peak current in connector

0 votes
1 answer
3k views

Find current flowing over an element given charge as a function of time

0 votes
1 answer
169 views

What do I need to know to design an LED lamp

-1 votes
2 answers
180 views

Solve for power over a resistor