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TEMLIB
  • Member for 7 years, 11 months
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23 votes

VHDL: Why is it hard to design a floating point unit in hardware?

12 votes
Accepted

VHDL: What is correct way to model open collector output for FPGA?

10 votes

Is there any way to use half-bits?

10 votes
Accepted

Why do I need a page directory?

9 votes

Why should we use 3.3 V instead of 3 V?

8 votes

What is DMIPS/MHz?

7 votes

Why are the SRAM data and address pins numbered?

7 votes
Accepted

Verilog - Synthesize High Speed Leading Zero Count

7 votes

VHDL how to make a redundant case statement simpler?

7 votes

Why is Ethernet So Power Hungry?

6 votes

Sine wave to square wave - Schmitt trigger

6 votes

Why does hardware division take much longer than multiplication?

6 votes
Accepted

Why the television manufacturers (Samsung, Sony, LG, so on) exceed the voltage capacity on led strips (backlight) on TV's?

4 votes
Accepted

How many transistors are there in a logic gate?

4 votes
Accepted

Is dram constantly refreshing during windows sleeps?

4 votes

How voltage is related to frequency in CPU?

4 votes

Purpose of the magnetics center tap in Ethernet

4 votes

What tasks does Graphics hardware perform and what steps does it follow to do so

4 votes

Single issue and Dual issue architecture

3 votes
Accepted

How does CPU read data from the RAM?

3 votes

FCS verification of ethernet frame

3 votes

How to find the expression for Vout?

3 votes
Accepted

5-stage pipelined implementation (RISC) of a microprocessor

3 votes

How to decrease used LUTs in FPGA Design?

3 votes

Why Xilinx ISE doesn't infer Block Ram for this Array?

3 votes

Difference between Micro-Operations in RISC and CISC processors

3 votes
Accepted

VHDL generate statement increment by 2

3 votes

Why didn't 1000BASE-TX gain more popularity than 1000BASE-T?

3 votes

VHDL - using PORT MAP in CASE?

3 votes
Accepted

Neutron Single Event Upset (NSEU) how its effect is mitigated in electronics in space vehicles?