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shuckc
  • Member for 10 years, 10 months
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29 votes
Accepted

Why wiggle nearby tracks on a PCB?

19 votes
Accepted

Is it normal to have SPI Clock with varying duty cycle?

11 votes
Accepted

Displaying a 2-digit integer on two 7-segment display

9 votes

How precise is the frequency of the AC electricity network?

9 votes

Why are bitfields in register not sequential?

9 votes

How to properly wind coils for a solenoid?

9 votes
Accepted

Quartus II: Where are the worst-case paths?

8 votes

What do chips like ELM327 and STN1110 do?

7 votes

Open Source verilog synthesizer

5 votes

Parameterized net width in Verilog

5 votes

Putting linear feedback shift registers on FPGA's

5 votes
Accepted

How to create a serial key (Registration key)

5 votes
Accepted

What are retimers?

4 votes

What is the size of a normal potentiometer screw hole?

4 votes

Would anyone know how to use the InterSense Navchip sensor with Linux?

3 votes
Accepted

Switching a 3 phase pump using a solid state relay

3 votes

Making a clock spin faster

3 votes
Accepted

How to upgrade a Quartus II project from SOPC to QSys?

3 votes
Accepted

Grouping input and output signals with the corresponding clock

3 votes
Accepted

Timings constrains for isochronous clocks

3 votes
Accepted

How do I make use of multipliers to generate a simple adder?

3 votes

How to identify areas of a FPGA design that use the most resources and area?

3 votes
Accepted

Designing a peripheral for soft core CPU

3 votes
Accepted

Can a barrel shifter be done combinatorially?

3 votes

Measuring direction of object (or angle of signal origin)

2 votes

Measuring direction of object (or angle of signal origin)

2 votes
Accepted

How to design a two-stage synchronizer with a clock divider in Verilog?

2 votes

Why implement microcontroller in FPGA?

2 votes

Software to draw waveforms

2 votes
Accepted

How to assign clock/reset to sram in Quartus?