User Damien

5 votes

4 answers

8k views

Quantifying the piezoelectric effect of ceramic capacitors

asked Sep 12, 2014 at 7:56

1 vote

0 answers

437 views

Why is a low resolution ADC (e.g. 4-bits) a bad idea for a Zero-IF GPS/GNSS RF front-end?

asked Apr 4, 2021 at 19:28

0 votes

0 answers

321 views

How do I choose IF for a GPS/GNSS RF Front-end?

asked Apr 4, 2021 at 19:11

3 votes

3 answers

136 views

What grade of fibre is used in optical fibre displays?

asked Aug 8, 2014 at 7:25

2 votes

1 answer

2k views

Forward voltage tolerance on an ordinary diode

asked Jan 1, 2019 at 7:14

2 votes

1 answer

753 views

Extending a PTC voltage rating with series resistance

asked Dec 19, 2017 at 7:37

3 votes

2 answers

2k views

Measuring crystal drive strength without a current probe

asked Jun 27, 2018 at 4:01

4 votes

3 answers

8k views

For a crystal oscillator circuit, what effect would a series resistor have on the inverter input?

asked Jun 11, 2018 at 10:39

3 votes

2 answers

2k views

Board to Board Connections in Potted Electronics

asked Mar 22, 2017 at 7:51

5 votes

1 answer

4k views

CDC Synchonisation primitives for an Altera FPGA

asked Aug 11, 2015 at 3:47

8 votes

2 answers

40k views

Protecting electronics against welding damage

asked Feb 5, 2014 at 11:14

18 votes

2 answers

2k views

Why would metal from a pad be underneath the solder mask in a footprint specification?

asked Sep 5, 2016 at 11:11

3 votes

2 answers

5k views

Configure (upload bitstream) to MAX10 without Altera tools using Linux

asked Aug 3, 2016 at 6:50

3 votes

2 answers

2k views

How large should a pad be for a 5mm screw terminal block?

asked Jul 21, 2013 at 5:50

6 votes

1 answer

168 views

Conflict Minerals in Electronics: What to look out for as a designer?

asked Nov 1, 2014 at 6:54

8 votes

4 answers

2k views

Op-Amps with unequal split supplies (e.g. V+ = 25V, V- = -11V)

asked Jan 16, 2015 at 0:06

13 votes

4 answers

8k views

How would one attach an optical fibre to a PCB for a display?

asked Jun 8, 2014 at 5:35

2 votes

2 answers

2k views

Transistor current limit circuit - power handling?

asked May 25, 2013 at 6:15

3 votes

1 answer

263 views

Synchronising GPIO transitions to an external clock

asked Sep 10, 2012 at 8:02

2 votes

1 answer

817 views

USB "Serial" Transceivers (PHY)

asked Oct 27, 2011 at 12:43

Stack Exchange Network

20 Questions

Quantifying the piezoelectric effect of ceramic capacitors

Why is a low resolution ADC (e.g. 4-bits) a bad idea for a Zero-IF GPS/GNSS RF front-end?

How do I choose IF for a GPS/GNSS RF Front-end?

What grade of fibre is used in optical fibre displays?

Forward voltage tolerance on an ordinary diode

Extending a PTC voltage rating with series resistance

Measuring crystal drive strength without a current probe

For a crystal oscillator circuit, what effect would a series resistor have on the inverter input?

Board to Board Connections in Potted Electronics

CDC Synchonisation primitives for an Altera FPGA

Protecting electronics against welding damage

Why would metal from a pad be underneath the solder mask in a footprint specification?

Configure (upload bitstream) to MAX10 without Altera tools using Linux

How large should a pad be for a 5mm screw terminal block?

Conflict Minerals in Electronics: What to look out for as a designer?

Op-Amps with unequal split supplies (e.g. V+ = 25V, V- = -11V)

How would one attach an optical fibre to a PCB for a display?

Transistor current limit circuit - power handling?

Synchronising GPIO transitions to an external clock

USB "Serial" Transceivers (PHY)