Electrical Engineering
Meta user
Network profile
460
reputation
2
5

John

Apparently, this user prefers to keep an air of mystery about them.

21
answers
0
questions
~21k
people reached
  • Member for 8 years, 4 months
  • 21 profile views
  • Last seen Mar 28 '18 at 8:44

Communities (10)

Top network posts

Top tags (42)

Score 15
Posts 4
Posts % 19
Score 13
Posts 4
Score 10
Posts 3
Score 9
Posts 1
Score 4
Posts 2
Score 3
Posts 2
View all tags →

Top posts (21) All Questions Answers | Votes Newest

9 Reverse engineering the manufacturer's programming sequence of an FPGA Feb 28 '17
3 Does nodal analysis work with alternating currents if every step is treated like DC? Mar 18 '13
3 Why delays cannot be synthesized in Verilog? Jul 14 '14
3 Is there an example of a Mealy state machine that can not be converted to a Moore? Nov 11 '16
2 Simplify a logic expression - Where have I gone wrong? Aug 18 '14
2 Transfer function of a rotary encoder May 10 '17
2 Is it possible to implement RC-5 not using interrupts? Jun 14 '17
2 How to interface an ADC with FPGA through the CLKOUT signal in verilog? Aug 4 '17
1 How would multiple ADC channels be processed? Jun 14 '17
1 How to create a counter to display 6 digits using anodes? May 16 '17
View all questions and answers →

Badges (7)

Gold

—

Silver

2

Rarest

Bronze

5

Rarest

View all badges →