User user204415 - Electrical Engineering Stack Exchange

user204415

Member for 8 years, 5 months
Last seen more than 2 years ago

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12 Questions

Score Activity Newest Views

3 votes

3 answers

895 views

Verilog inout port

asked Oct 18, 2018 at 11:39

3 votes

1 answer

2k views

5V (analog) to 3.3V (analog) for current measuring

asked Nov 7, 2018 at 12:23

1 vote

1 answer

2k views

Generate clock jitter in a testbench

asked Jun 26, 2019 at 23:37

1 vote

3 answers

19k views

Using $floor in Verilog

asked Jan 19, 2018 at 8:57

0 votes

1 answer

162 views

Supply microcontroller and solenoid with the same battery at different voltage levels

asked Apr 10, 2015 at 16:11

0 votes

2 answers

3k views

Very big matrix multiplication in FPGA

asked Jan 22, 2018 at 11:49

0 votes

3 answers

410 views

benefits of removing reset in an FPGA design

asked Feb 13, 2020 at 0:19

0 votes

0 answers

388 views

How to interface a camera with a 4-pin aviation connector?

asked Dec 19, 2020 at 22:32

0 votes

2 answers

60 views

What is a "discrete time controller"?

asked Jan 16, 2021 at 11:51

0 votes

2 answers

111 views

Why do we use FIFOs and RAM in an image processing scheme?

asked Mar 28, 2021 at 10:15

-1 votes

1 answer

469 views

Output internal reg to a .txt in Verilog

asked Jan 22, 2018 at 8:47

-1 votes

1 answer

345 views

How to use QSUB to submit jobs in parallel?

asked Aug 25, 2019 at 18:03