User EquipDev - Electrical Engineering Stack Exchange

EquipDev

Member for 8 years, 7 months
Last seen more than a week ago

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561

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22

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Yearling

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Oct 3, 2021
Notable Question

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Jul 3

15

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Tumbleweed

Feb 9, 2017
Curious

Jun 7, 2020
Commentator

Mar 30, 2016

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intel-fpga

2

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6

Posts

22

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xilinx

1

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7

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26

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quartus

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2

Posts

7

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video

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7

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fpga

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10

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37

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orcad

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Top posts

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All Questions Answers

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8

Is a multimeter with 1,200,000 counts actually a 6½ digit multimeter?

Dec 23, 2018

8

Can continuity test cause component damage?

Jun 6, 2020

8

Is there a standard way over JTAG to program a flash connected to an FPGA?

Feb 25, 2022

3

How to specify a minimum clock to output time in output timing constrain?

Mar 30, 2016

3

What is the difference between DCM and PLL in e.g. Xilinx FPGA?

Nov 16, 2016

2

Why does FPGA PCI Express Tx output have on-chip termination of 100 Ohm?

Jan 12, 2021

2

How to ignore simulation only ports when mapping to FPGA pins?

May 20, 2021

2

What value to use for Byte Count field in PCI Express (PCIe) IO read completion?

May 25, 2021

2

How to monitor Ethernet packet loss real time on different connections?

May 7, 2022

1

How fast is L1 cache of ARM Cortex-A9 in Xilinx Zynq-7000 FPGA?

Aug 12, 2019

Top network posts

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181

How to get absolute path of a pathlib.Path object?

31

How to calculate length of string in pixels for specific font and size?

29

Hotkey for next song in Spotify

29

How to compare two files as part of unittest, while getting useful output in case of mismatch?

20

How to save pillow image object to Django ImageField?