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Danny
  • Member for 9 years, 3 months
  • Last seen more than 1 year ago
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Verilog test bench incorrectly reading test vector
Lovely, that fixed it. Also had to change if (testvectors[vectornum] === 4'bx) to if (testvectors[vectornum] === 5'bx), otherwise it won't display the total number of test errors.
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