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Electrical Engineering
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cr1901
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Just another ECE. I mainly program (both front-end and back-end) and work with FPGAs. Some aspects of my analog skill set need work, so I caved and joined :P.

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question
7
DDR(2-4) Training and Length Matching
Oct 30, 2017
question
5
How might an LPDDR2 PHY be designed?
May 24, 2017
question
4
In clock recovery, how is the recovered clock used to recover data?
Sep 28, 2017
question
4
What is the purpose of this Verilog code for implementing 3-port Block RAM?
Jan 3, 2018
question
4
Importance of Source-Body Connection In MOSFET Cascode Amplifier
May 11, 2018
answer
4
How actually an integral transformation(Fourier and Laplace) works?
Dec 30, 2015
question
3
Calculated MOSFET switching time does not agree w/ expected results
Dec 30, 2015
question
2
Why does copper pour cause impedance discontinuities?
Apr 1, 2017
question
2
How was physical design verification accomplished before CAD?
Apr 5, 2017
question
1
Why are delay slots problematic in implementing interrupts in a pipelined processor?
Jan 16, 2017