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Dec 17, 2014 at 1:36 answer added patellar-myotatic timeline score: 1
Apr 28, 2014 at 10:19 vote accept Medo42
Apr 25, 2014 at 17:10 answer added Andy aka timeline score: 1
Apr 25, 2014 at 15:46 comment added Medo42 @DaveTweed I'm considering switching Q1 and RLoad (and turning Q1 into an N-FET to avoid the base current error)... had tried it before, but it caused oscillation problems. However, thinking back I still had a smaller shunt with an amplifier in there back then, so I probably had a gain>1 in the feedback loop. If I see it correctly, the worst-case gain I can get if I just switch Q1 and RLoad here is 1 (when Q1 turns into a voltage follower again). Have to re-think things other parts of the circuit yet again, sigh. Being a beginner is hard.
Apr 25, 2014 at 14:04 comment added Medo42 Yes, it's referenced to the negative output of V1. I added a ground symbol now, hope that makes it more clear.
Apr 25, 2014 at 14:03 comment added Dave Tweed Simplest thing would be to put the load resistance on the collector side of the NPN, then the transistor does most of the heavy lifting with regard to compliance.
Apr 25, 2014 at 14:03 history edited Medo42 CC BY-SA 3.0
edited body
Apr 25, 2014 at 14:00 comment added Vladimir Cravero yes, that's why I spoke of a tradeoff. you want a faster system->you raise the dominant pole
Apr 25, 2014 at 14:00 comment added Dave Tweed What is V_in referenced to? The negative end of V1? You should include a ground symbol to eliminate the ambiguity.
Apr 25, 2014 at 13:59 comment added Medo42 Wouldn't that just have the same effect as reducing the capacitor value, i.e. raising the corner frequency?
Apr 25, 2014 at 13:47 answer added Spehro 'speff' Pefhany timeline score: 1
Apr 25, 2014 at 13:10 comment added Vladimir Cravero Can't you just get rid of \$R_2\$ or at least reduce it? The only problem I see is that the circuit becomes less stable... It's a tradeoff.
Apr 25, 2014 at 13:02 history asked Medo42 CC BY-SA 3.0