Timeline for Reducing the memory address bus by adding banks
Current License: CC BY-SA 2.5
7 events
| when toggle format | what | by | license | comment | |
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| Apr 19, 2011 at 17:24 | vote | accept | 200ok404notfound | ||
| Mar 31, 2011 at 20:30 | comment | added | davidcary | @200ok404notfound: Yes, your description of interleaved memory is valid -- I hesitate to say it is "right" only because bank switching is just as valid. You are describing interleaved memory. W5VO and jpc and supercat are describing bank switching. The Sojourner Mars rover and some TRS-80 Model 100 computers use bank switching between the 16 address pins of the 80C85 and the RAM; they never used interleaved memory. Both techniques have their place. | |
| Mar 23, 2011 at 3:53 | comment | added | 200ok404notfound | I think it has to do with the last bit of the address. If you have two banks, then you can assign all the even addresses to one line, and all the odd addresses to the other. The last bit tells you if the address is odd or even, but if you use the CS line to select lines, then you don't need it. Does this sound right? | |
| Mar 23, 2011 at 3:45 | comment | added | jpc | There are two ways to reduce the number of address lines. One is to divide the memory into rows and columns and latch the row address. Truly random access then requires at least 2 clock cycles but columns inside a row can be accessed quickly. This is how DRAM works. The other method is to have a 32-bit data bus, throw away 2 low-order address bits and only access whole words at once. | |
| Mar 23, 2011 at 3:21 | comment | added | jpc | @2000k404notfound It does allows you to expand beyond the address bus width that is available. I think I do not fully understand your question. If you want to address 4k memory you will need 12 bits of address lines somewhere. The only question is where do you stuff them. | |
| Mar 23, 2011 at 3:16 | comment | added | 200ok404notfound | But how does that reduce the number of address lines? | |
| Mar 22, 2011 at 10:27 | history | answered | jpc | CC BY-SA 2.5 |