Timeline for Why does my output stage rectify when I use a preceding stage?
Current License: CC BY-SA 3.0
14 events
| when toggle format | what | by | license | comment | |
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| May 22, 2015 at 19:00 | answer | added | Kevin White | timeline score: 0 | |
| Jul 8, 2014 at 14:52 | vote | accept | MJXS | ||
| Jul 8, 2014 at 14:27 | comment | added | MJXS | VAS = voltage amplification stage. Sorry for the confusion. | |
| Jul 8, 2014 at 11:51 | comment | added | Olin Lathrop | What is a "VAS" source? It seems this is something specific to your simulation software. Use simulations if you want, but the question should stay about the electronics (unless it's a question specifically about simulation, which this isn't). | |
| Jul 8, 2014 at 10:39 | answer | added | zecharia | timeline score: 0 | |
| Jul 8, 2014 at 9:19 | comment | added | user16324 | Bias the stage properly and AC couple into it. (Or level shift but AC coupling is a simpler place to start) | |
| Jul 8, 2014 at 1:12 | history | edited | MJXS | CC BY-SA 3.0 |
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| Jul 8, 2014 at 0:46 | comment | added | MJXS | Scratch that - on the positive waveform, the base is more positive than the collector and throws it into saturation. I understand about the biasing now. But then how was this circuit supposed to work in the first place? I built it as the author drew it | |
| Jul 8, 2014 at 0:36 | history | edited | MJXS | CC BY-SA 3.0 |
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| Jul 8, 2014 at 0:30 | answer | added | biggvsdiccvs | timeline score: 2 | |
| Jul 7, 2014 at 23:57 | answer | added | WhatRoughBeast | timeline score: 1 | |
| Jul 7, 2014 at 23:11 | history | edited | MJXS | CC BY-SA 3.0 |
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| Jul 7, 2014 at 23:05 | history | edited | MJXS | CC BY-SA 3.0 |
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| Jul 7, 2014 at 22:56 | history | asked | MJXS | CC BY-SA 3.0 |