Timeline for Supercap charging circuit for RTC backup on STM32
Current License: CC BY-SA 3.0
23 events
| when toggle format | what | by | license | comment | |
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| Sep 26, 2022 at 7:08 | answer | added | user2009449 | timeline score: 0 | |
| Apr 19, 2016 at 11:44 | history | tweeted | twitter.com/StackElectronix/status/722390360178212865 | ||
| S Mar 26, 2016 at 15:32 | history | suggested | kaliczp |
stm32 tag is added.
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| Mar 26, 2016 at 12:39 | review | Suggested edits | |||
| S Mar 26, 2016 at 15:32 | |||||
| Jan 13, 2016 at 23:49 | comment | added | William Brodie-Tyrrell | also, the holdup time (RTC life without Vdd present) will likely be dominated by the self-discharge leakage current of the supercap. If you have multiple 2.7V caps in series, then you will need a balancing circuit and if that's just resistors, it will increase your leakage current by 10x. | |
| Jan 13, 2016 at 23:34 | comment | added | William Brodie-Tyrrell | So I'm way late to this question but found it because I plan to do a similar thing. The STM32 RTC works fine even with absolutely no Vbat present, in which case it runs off Vdd but will obviously lose state when Vdd is withdrawn. So I don't think you need to worry about the power-up sequence; it should be fine even if it took a couple of minutes for Vbat to come up as long as power was not lost before C1 is charged. I think you could reasonably put R1 in series with D1 instead of D1, but the 1.5uA*22R voltage loss under load is probably not relevant! And make D1 a Schottky; you want low Vf | |
| May 14, 2015 at 8:13 | answer | added | dfacchin | timeline score: 1 | |
| Nov 1, 2014 at 9:23 | vote | accept | fgrieu | ||
| Sep 17, 2014 at 6:43 | comment | added | markt | That's pretty much exactly the circuit that I use for STM32F407 RTC's Vbat. A 2K2 resistor works fine. I built the first one about 12 months ago, it has seen regular usage, and haven't had any problems with it or several others since. | |
| Sep 16, 2014 at 19:48 | answer | added | lancer827 | timeline score: 2 | |
| Sep 16, 2014 at 18:20 | history | edited | fgrieu | CC BY-SA 3.0 |
Polish units
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| Sep 16, 2014 at 13:35 | answer | added | Dzarda | timeline score: 2 | |
| Sep 16, 2014 at 11:50 | comment | added | KyranF | @fgrieu here is one by ON Semi which has typical 1.6uA quiescent current onsemi.com/pub_link/Collateral/NCP308-D.PDF EDIT: I found one for 150nA from TI ti.com/product/tps3839a09 | |
| Sep 16, 2014 at 11:39 | comment | added | fgrieu | @KyranF: I'm operating on the assumption that with basic cleanup, FR4 PCB current leakage is well below 1nA at 5V (see e.g. Appendix B.1 here). I expect that, by far, leakage is dominated by the STM32 (1uA), the supercap (20nA?), the diode (20nA?), and whatever else is explicitly connected. | |
| Sep 16, 2014 at 11:28 | comment | added | KyranF | @fgrieu it is extremely unfair to aim for 1uA draw, you will have leakage and parasitics higher than this, i bet you. Check out the STM809 or STM810 by ST Microelectronics, a reset controller with typical 6uA draw. | |
| Sep 16, 2014 at 11:24 | history | edited | fgrieu | CC BY-SA 3.0 |
Expand requirement on not frying STM32
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| Sep 16, 2014 at 11:20 | comment | added | fgrieu | @KyranF: that solves the (possible) problem that the STM32 might not operate with VBAT<2V (I fail to see such mode of operation specified); but that works only if the reset-monitor with a 3V threshold draws much less than 1uA on its sense input including when VDD is low, and I know no model with this specified. | |
| Sep 16, 2014 at 11:16 | history | edited | fgrieu | CC BY-SA 3.0 |
added 27 characters in body
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| Sep 16, 2014 at 11:11 | comment | added | KyranF | use a simple reset-monitor with a 3V threshold, which will hold the STM32 in reset until the VBAT line gets above 3V? | |
| Sep 16, 2014 at 10:55 | comment | added | fgrieu | @Lior Bilia: That's part of the question ! See my does not fry the STM32 requirement. As far as I can tell, VBAT low while VDD at 3.3V is within the Absolute Maximum Ratings of the STM32, and will even let it operate reliably except for the RTC and perhaps some of the RAM; but I could be wrong. | |
| Sep 16, 2014 at 10:52 | comment | added | Lior Bilia | Can the MCU accept the slow rise time on VBAT? | |
| Sep 16, 2014 at 10:48 | history | edited | fgrieu | CC BY-SA 3.0 |
Adjust values
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| Sep 16, 2014 at 10:42 | history | asked | fgrieu | CC BY-SA 3.0 |