Timeline for What would make me choose Verilog or VHDL over schematic design on CPLDs or FPGAs?
Current License: CC BY-SA 3.0
2 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Oct 24, 2014 at 14:40 | review | First posts | |||
| Oct 24, 2014 at 14:50 | |||||
| Oct 24, 2014 at 14:40 | history | answered | wailashi | CC BY-SA 3.0 |