Timeline for MRF49XA Microchip Transceiver
Current License: CC BY-SA 3.0
9 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| May 20, 2015 at 15:14 | answer | added | a blake | timeline score: 0 | |
| Aug 3, 2011 at 16:56 | answer | added | Rocketmagnet | timeline score: 2 | |
| Jun 1, 2011 at 22:15 | comment | added | SimonBarker | Sadly the chips are connected correctly (would have been a nice simple solution) I swapped them anyway just to check and still nothing. Thanks for the link, I will have a proper dig through the code tomorrow, looks great on the surface though. What do you mean by the SPI phase? Is that related to when the data changes related to the clock pulse? I notice the timing diagrams in the MRF49XA data sheet show the data changes when the clock is low. On my measured timing diagrams data and clock seem to change at the same time, I can't find a register to control this delay on the pic though.Cheers | |
| Jun 1, 2011 at 21:49 | comment | added | Toby Jaffey | Have you checked your SPI phase and polarity settings? There's a bit banging sample driver here to compare with akolman.info/schoolstuf/EECS_542/files/final%20project/… | |
| Jun 1, 2011 at 21:42 | comment | added | Toby Jaffey | Just to check - you are connecting the output from the master to the input on the slave - MO to SI? | |
| Jun 1, 2011 at 20:44 | history | tweeted | twitter.com/#!/StackElectronix/status/76026373537411072 | ||
| Jun 1, 2011 at 20:34 | answer | added | Leon Heller | timeline score: 2 | |
| Jun 1, 2011 at 20:05 | history | edited | Daniel Grillo | CC BY-SA 3.0 |
improved formatting
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| Jun 1, 2011 at 19:59 | history | asked | SimonBarker | CC BY-SA 3.0 |