Timeline for How to efficiently design the opcode for a CPU?
Current License: CC BY-SA 3.0
4 events
| when toggle format | what | by | license | comment | |
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| Jan 28, 2015 at 1:35 | comment | added | user65335 | @Benjoyo you could have a bunch more ALU instructions with the upper bit set. Also my jump condition coverage was pretty weak and most normal branches would require two instructions. Generally, I thought of the categories as: Math / Control / Memory | |
| Jan 27, 2015 at 23:09 | comment | added | Benjoyo | This kind of optimization is what I am looking for at the moment. But I have a 5 bit opcode and I struggle with grouping the commands together so that it makes sense in the circuit. | |
| Jan 27, 2015 at 21:56 | review | First posts | |||
| Jan 27, 2015 at 22:04 | |||||
| Jan 27, 2015 at 21:50 | history | answered | user65335 | CC BY-SA 3.0 |