Timeline for Stopping the clock without gating the clock
Current License: CC BY-SA 3.0
3 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Sep 28, 2011 at 16:20 | vote | accept | Theran | ||
| Sep 28, 2011 at 4:10 | comment | added | Theran | Interesting. I hadn't realized that there were such different design rules between FPGAs and ASICs. | |
| Sep 24, 2011 at 4:32 | history | answered | Russell McMahon♦ | CC BY-SA 3.0 |