Timeline for memory for the simplest possible computer (Pi0K)
Current License: CC BY-SA 3.0
6 events
| when toggle format | what | by | license | comment | |
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| Jan 8, 2016 at 8:44 | comment | added | Criticizing Israel not allowed | @TonyRobinson "It'll be wired to a Raspberry Pi so power is available." - ...maybe. Depends on the maximum power available through a Raspberry Pi, and which logic family you plan to use. (I'd expect that an average bench PSU would be able to supply quite a bit more power, though) | |
| Jan 8, 2016 at 4:22 | comment | added | Tony Robinson | ICs are out - they hide what's really happening. I want every signal to be exposed as far as possible. I really don't care about power - I can't see power being a problem, it'll be wired to a Raspberry Pi so power is available. One transistor DRAM may be a much better way to go than my array of capacitors ideas as the earlier post suggested - I'll have to work out what transistors are needed for that to keep the charge leakage low enough (I need refresh times in the order of minutes). Else, yes, flip flops look like the next best idea. | |
| Jan 8, 2016 at 3:06 | history | edited | Phil Frost | CC BY-SA 3.0 |
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| Jan 8, 2016 at 3:05 | comment | added | Phil Frost | You're right -- I had in mind simple RTL flip-flops. I'll edit to clarify. | |
| Jan 7, 2016 at 22:16 | comment | added | Tom Carpenter | DRAM is more power consuming as it needs to be constantly refreshed whereas SRAM uses only a small quiescent current when idle. The reason for using capacitors is because it only requires one transistor per bit, so allows much higher memory densities. | |
| Jan 7, 2016 at 20:21 | history | answered | Phil Frost | CC BY-SA 3.0 |