Timeline for Generated clock constraints in vivado
Current License: CC BY-SA 3.0
4 events
| when toggle format | what | by | license | comment | |
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| Jan 25, 2016 at 1:06 | comment | added | Tom Carpenter |
@chasep255 pdm_clk_div was the instance name. clk_out is the output register of that instance. Say you had another instance called another_clk_div, then the second constraint would target another_clk_div|clk_out
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| Jan 25, 2016 at 1:02 | comment | added | chasep255 | Wouldn't I also need to add the instance name somewhere since I can have two instances creating different frequencies. | |
| Jan 23, 2016 at 15:56 | history | edited | Tom Carpenter | CC BY-SA 3.0 |
added 319 characters in body
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| Jan 23, 2016 at 15:48 | history | answered | Tom Carpenter | CC BY-SA 3.0 |