Timeline for Why do CPU's typically connect to only one bus?
Current License: CC BY-SA 3.0
14 events
| when toggle format | what | by | license | comment | |
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| S Feb 6, 2018 at 6:01 | history | edited | Voltage Spike♦ |
Correct grammar at title and changed tags for meaningful filtering
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| S Feb 6, 2018 at 6:01 | history | suggested | Chaminda Bandara | CC BY-SA 3.0 |
Correct grammar at title and changed tags for meaningful filtering
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| Feb 6, 2018 at 4:42 | review | Suggested edits | |||
| S Feb 6, 2018 at 6:01 | |||||
| Mar 3, 2016 at 21:46 | answer | added | user6030 | timeline score: 0 | |
| Feb 26, 2016 at 16:14 | answer | added | supercat | timeline score: 6 | |
| Feb 26, 2016 at 7:39 | comment | added | slebetman | That diagram above is still relevant. These days that is not a diagram of a motherboard but the CPU itself. Replace "CPU" with "core" and "chipset" with "CPU". | |
| Feb 26, 2016 at 4:53 | history | edited | DrZ214 | CC BY-SA 3.0 |
added 56 characters in body
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| Feb 26, 2016 at 4:26 | history | tweeted | twitter.com/StackElectronix/status/703073695124885504 | ||
| Feb 26, 2016 at 2:56 | answer | added | uint128_t | timeline score: 9 | |
| Feb 26, 2016 at 2:51 | answer | added | Tom Carpenter | timeline score: 43 | |
| Feb 26, 2016 at 2:42 | history | edited | DrZ214 | CC BY-SA 3.0 |
added 225 characters in body
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| Feb 26, 2016 at 2:36 | comment | added | DrZ214 | @TomCarpenter Yeah that's starting to look more like it. The diagram I posted is what I've seen "everywhere", including school, so I figured it was more typical. | |
| Feb 26, 2016 at 2:32 | comment | added | Tom Carpenter | That's a very old approach. Nowadays the CPU has the root complex and memory controller built in - so connects directly to PCIe devices, RAM, and what is effectively the south bridge. For example this | |
| Feb 26, 2016 at 2:12 | history | asked | DrZ214 | CC BY-SA 3.0 |
