Timeline for Updating Multiple Ports on 8bit AVR in Single Cycle
Current License: CC BY-SA 3.0
6 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Mar 12, 2016 at 20:39 | vote | accept | user3081739 | ||
| Mar 12, 2016 at 20:12 | comment | added | Chris Stratton | Trying to hang a large external SRAM off of these chips is basically starting off with a poorly conceived design. Pick something with an external memory space and a sufficient linear address space - 32 bit cores are not expensive these days. | |
| Mar 12, 2016 at 20:06 | answer | added | supercat | timeline score: 3 | |
| Mar 12, 2016 at 17:34 | answer | added | Bruce Abbott | timeline score: 2 | |
| Mar 12, 2016 at 14:25 | answer | added | Tom Carpenter | timeline score: 5 | |
| Mar 12, 2016 at 9:39 | history | asked | user3081739 | CC BY-SA 3.0 |