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m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

The Basic RS NAND Latch says:

Edit

It is understood that when the water is at the minimum when min=0, so it is reversed. Just add a NOT gate after the min, and you can use below circuits. A NOT gate could be build by a NAND gate by shorting its inputs.Here is the final circuit:

m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

The Basic RS NAND Latch says:

Edit

It is understood that when the water is at the minimum when min=0, so it is reversed. Just add a NOT gate after the min, and you can use the circuits above. A NOT gate could be build by a NAND gate by shorting its inputs.Here is the final circuit:

m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

![SR Latch][1] ![SR Latch using NAND gates][2] ![Implementation][3]

[The Basic RS NAND Latch][4]

Edit

It is understood that when the water is at the minimum min=0, so it is reversed. Just add a NOT gate after the min, and you can use below circuits. A NOT gate could be build by a NAND gate by shorting its inputs. [1]: https://i.sstatic.net/W0sNw.png [2]: https://i.sstatic.net/ObIPR.gif [3]: https://i.sstatic.net/xNPxy.png [4]: http://www.play-hookey.com/digital/rs_nand_latch.html

m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

The Basic RS NAND Latch says:

Edit

It is understood that when the water is at the minimum when min=0, so it is reversed. Just add a NOT gate after the min, and you can use below circuits. A NOT gate could be build by a NAND gate by shorting its inputs.Here is the final circuit:

m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

Source

m=Low(0) and M=High(1) will never happen simultaniously

I didn't understand what you mean by above statement.

But what I understand is m and M will never be high at the same time. Since then, I think what you need is an SR Latch. It is easy to build an SR Latch using NAND gates. Here are the circuits I tried:

![SR Latch][1] ![SR Latch using NAND gates][2] ![Implementation][3]

[The Basic RS NAND Latch][4]

Edit

It is understood that when the water is at the minimum min=0, so it is reversed. Just add a NOT gate after the min, and you can use below circuits. A NOT gate could be build by a NAND gate by shorting its inputs. [1]: https://i.sstatic.net/W0sNw.png [2]: https://i.sstatic.net/ObIPR.gif [3]: https://i.sstatic.net/xNPxy.png [4]: http://www.play-hookey.com/digital/rs_nand_latch.html