Timeline for Quartus 2 VHDL Clock Frequency Divider: can't determine definition of operator "+"
Current License: CC BY-SA 3.0
3 events
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| Jun 23, 2016 at 14:57 | comment | added | Deniz Yildirim | Oh I got you I guess. For single bits, we cant make the things work by count<=count + '1'; . I still dont get why it means and though ? But it is safe to say count4<=count4 +"01" if it was a std_logic_vector of size 2 right ? | |
| Jun 23, 2016 at 14:54 | comment | added | Deniz Yildirim | There is very little difference between your code and mine. I tried to write count4<=count4+1 in my code but mine is still not working and giving the same error. I did not understand how count<= count + '1' means and operation but count<=count +1 does not ? I also tried your code with count<=count+"001" and it is working as well. Im confused | |
| Jun 22, 2016 at 21:44 | history | answered | user8352 | CC BY-SA 3.0 |