Timeline for PNP high side switch base current leak?
Current License: CC BY-SA 3.0
12 events
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| Jul 17, 2016 at 21:04 | comment | added | jbord39 | But, if PI_RST is floating, the diode will not be forward biased. Because for it to be forward biased, current must flow, which it cannot, due to the PNP base only sourcing current, and not sinking it. Why are these two functions joined (generating BUFFEN and lighting up this LED), if VCCIO is not supposed to have any effect on the LED? One circuit with PI_RST to light up the diode when not floating. One circuit to interface the 5V with 3.3V and produce BUFFEN. If you were to write a truth table for these situations it would be clear. | |
| Jul 17, 2016 at 18:26 | comment | added | nsayer | The only way for the (existing) diode to be forward biased is for either !PI_RST to be grounded or for VCCIO to be higher than 3.3v. In the former case, the LED should be on, and in the latter case it won't be. I believe the leakage in this case is either leakage through !PI_RST (their version of tri-state might be that it's configured as an input) or reverse-current through that diode and pull-up to VCCIO and from there to the Vcc pin of the '125. | |
| Jul 17, 2016 at 7:52 | comment | added | nsayer | Think of it this way: !PI_RST does two things: It goes through a diode+pull-up to become !BUFFEN, and it also turns on the LED when it's asserted low. The diode+pull-up is required because !BUFFEN is relative to VCCIO, but the R-Pi GPIO pins are relative to 3.3v. That's also why the transistor+LED circuit is fed from 3.3v - because the GPIO will be +3.3v, 0v or hi-z. | |
| Jul 17, 2016 at 7:26 | comment | added | nsayer | VCCIO isn't supposed to have any effect on the LED. VCCIO is acting as a pull-up for !BUFFEN, which goes off to the '125 chip. | |
| Jul 17, 2016 at 6:18 | comment | added | jbord39 | But, if PI_RST is connected to ground, then there is no control granted by the VCCIO input. Because now the VCCIO just goes through a resistor and diode to ground. In parallel to this there is now the BJT circuit, but the VCCIO has no effect, if PI_RST is held low in normal operation. | |
| Jul 17, 2016 at 5:33 | comment | added | user57037 | I know the point of your post. But you missed something in one of the comments. The OP is actually driving !PI_RST low. The LED is supposed to be off all the time except when the OP drives !PI_RST low. At least that is how I read it. | |
| Jul 17, 2016 at 4:52 | comment | added | jbord39 | The point of my post is that the circuit doesn't work without the leakage path. The problem is the diode; w/o any leakage path it prevents the PNP from have enough base current to forward bias. | |
| Jul 17, 2016 at 4:49 | comment | added | user57037 | I think you are right about the fact that current is leaking. I suspect that the input pin has an internal pulldown resistor or something else attached to that net (not shown) is sinking a small amount of current. I think the OP needs to identify the current leakage path before deciding on a fix. | |
| Jul 17, 2016 at 4:44 | comment | added | jbord39 | Yes, it was just a quick approximation; I should have clarified that. | |
| Jul 17, 2016 at 4:43 | comment | added | user57037 | In your simulation, you have three diodes in series rather than just one diode. Are those silicon diodes? Are you assuming that three silicon diodes have about the same Vf as one red LED? I think that assumption is probably valid, but I just want to confirm. | |
| Jul 17, 2016 at 2:02 | history | edited | jbord39 | CC BY-SA 3.0 |
added solution
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| Jul 17, 2016 at 1:41 | history | answered | jbord39 | CC BY-SA 3.0 |