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Mar 30, 2017 at 17:38 history closed Autistic
Voltage Spike
pipe
Dmitry Grigoryev
brhans
Duplicate of Can't this vhdl program be viewed in simulation?
Mar 27, 2017 at 10:49 review Close votes
Mar 30, 2017 at 17:38
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Aug 2, 2016 at 10:13 comment added user16324 As I said in my previous comment, here, electronics.stackexchange.com/questions/249052/… , you don't need to do this if your simulator supports VHDL-2008. And if it doesn't, you just need to compile the relevant source files into the relevant library.
Aug 2, 2016 at 8:44 answer added A. Kieffer timeline score: 0
Aug 2, 2016 at 8:08 history asked Anwesa Roy CC BY-SA 3.0