Timeline for Cycle time between flip-flops with delay
Current License: CC BY-SA 3.0
17 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Aug 15, 2016 at 17:06 | comment | added | Mathmatic | @Dave Tweed♦ : So what you say? | |
| Aug 14, 2016 at 19:47 | comment | added | Mathmatic | Can you check if what I wrote above question is that true? (I edited the question) | |
| Aug 14, 2016 at 18:57 | comment | added | Dave Tweed | It's just more of the same. You have to consider the path between any pair of FFs individually, using the techniques I already described. When you have all of the individual answers, the largest of them will determine the minimum system clock period. As you add FFs and CLs between them, you just have more paths to consider. This is why timing analysis tools were developed for large projects, because doing it all by hand quickly becomes impractical. But you still need to understand the underlying concepts in order to use what they tell you. | |
| Aug 14, 2016 at 18:48 | comment | added | Mathmatic | Ok, Can you see the other example i gave? I edited the question. (Perhaps with the second example I understand this topic ...) | |
| Aug 14, 2016 at 18:46 | comment | added | Dave Tweed | It follows from the timing diagrams. Really, I don't know how to make this any simpler. | |
| Aug 14, 2016 at 18:23 | comment | added | Mathmatic | How did you get this: Tclk(FF2) - Tclk(FF1) = Tper12(min) - Delay1(max) + Delay2(min) | |
| Aug 14, 2016 at 18:21 | comment | added | Dave Tweed | Tper12 = the clock period for the FF1-->CL1-->FF2 path. | |
| Aug 14, 2016 at 18:19 | comment | added | Mathmatic | Can you explain what is the meaning of "Tper12? ? | |
| Aug 14, 2016 at 18:02 | comment | added | Dave Tweed | See the edit above. | |
| Aug 14, 2016 at 18:01 | history | edited | Dave Tweed | CC BY-SA 3.0 |
add second section
|
| Aug 14, 2016 at 17:39 | comment | added | Mathmatic | There should be no general formula in this case? (I'm really trying to figure out how to get there - but I can not ..) | |
| Aug 14, 2016 at 17:37 | comment | added | Dave Tweed | That's why I put "homework" in quotes. Regardless of where the problem actually came from, the point is to help you work out the solution on your own, not to hand it to you on a silver platter. | |
| Aug 14, 2016 at 17:16 | comment | added | Mathmatic | This is not about homework, I try to understand in general how the "delay", entered the formula of the cycle time? I know to draw the diagram. I ask only about the formula. And I'm trying to understand how the formula should be, and it still is not clear from the diagram. There is no general formula in case of delay? (I brought this case just an example out of my head. Only to realize through this example what should be the formula.) | |
| Aug 14, 2016 at 15:29 | comment | added | Dave Tweed | @jbord39: Yes. Doing it in ASCII was simpler than firing up a drawing tool. I'm used to doing it from back in the days when I had to do all of my documentation in ASCII. | |
| Aug 14, 2016 at 15:28 | comment | added | jbord39 | Did you create those timing diagrams by hand? | |
| Aug 14, 2016 at 15:25 | history | edited | Dave Tweed | CC BY-SA 3.0 |
added 163 characters in body
|
| Aug 14, 2016 at 15:20 | history | answered | Dave Tweed | CC BY-SA 3.0 |