You have posted several FPGA and PL implementation questions. The problem is that these questions are complex and not easy to answer. I would suggest you to watch several dozen of of Xilinx video tutorial just to have a general idea of how things work and what should be expected. Then, there are hundreds of datasheets like UG761 that you can read on and get your answers.

You are asking for an example - I bet there is one somewhere in the documentation - and it is not as simple as two lines of code, so I doubt someone would try answering it. Use Xilinx DOC Navigator. Dive into it. You can check out this series of videos - the guy focuses on DDR-DMA transfers and gives an introduction to AXI4 interface.

You have posted several FPGA and PL implementation questions. The problem is that these questions are complex and are not easy to answer. I would suggest you to watch several dozens of Xilinx video tutorials just to have a general idea of how things work and what should be expected. Then, there are hundreds of datasheets like UG761 that you can read and get your answers from. Use Xilinx DOC Navigator. Dive into it.

You are asking for an example - I bet there is one somewhere in the documentation - and it is not as simple as two lines of code. Follow these series of videos - the guy focuses on PS-DDR-DMA transfers and gives an introduction to AXI4 interface.