Timeline for Why is a 0.001uF capacitor in parallel with the base-emitter of this transistors?
Current License: CC BY-SA 3.0
20 events
| when toggle format | what | by | license | comment | |
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| Oct 3, 2016 at 5:48 | vote | accept | Araz | ||
| Oct 2, 2016 at 16:05 | answer | added | Ale..chenski | timeline score: 2 | |
| Oct 2, 2016 at 10:55 | comment | added | Rohat Kılıç | @Araz No, I don't have any technical source for it, but I can say that 5 x fsw does not change rise and fall times of the signal a lot -depending on the frequency, of course. | |
| Oct 2, 2016 at 10:21 | comment | added | user16324 | We don't know what else the MCU pin is doing. If it's also part of an SPI interface or something, it could get busy for a millisecond now and again, in which case the capacitor may reduce flicker or unwanted switching activity | |
| Oct 2, 2016 at 10:19 | comment | added | Araz | @RohatKılıç Thank you, How you know that 5 x fsw is a good cut-off frequency? have you any technical source for it? | |
| Oct 2, 2016 at 8:36 | comment | added | Rohat Kılıç | @Araz If you don't use either C1 or C2 or both, the circuit will work with no problems. C1 reduces EMI coming from PWM due to switching action of Q2 and load. In my designs, I place such LPFs with a cut-off frequency of about (5 x fsw). | |
| Oct 2, 2016 at 8:31 | comment | added | Araz | @Passerby Can you explain your mean more? | |
| Oct 2, 2016 at 8:29 | comment | added | Araz | @RohatKılıç should we place a LPF always in BJT bases? if yes, how we should define best cut-off frequency? I see this cap is used in K-LINes too. | |
| Oct 2, 2016 at 8:26 | comment | added | Passerby | I'm assuming it's too prevent too much oscillation by the circuit. Or hysterics. | |
| Oct 2, 2016 at 8:21 | comment | added | Araz | @RohatKılıç Yes, It is a current limitter, but what happened if i don't use C1 capacitor? This question is also applied to C2. | |
| Oct 2, 2016 at 8:18 | comment | added | Rohat Kılıç | Q1, C1 and R1 forms a simple current limiter with 600mV / 51ohm = 12mA of current limit. C1 and R1 forms and LPF with cut-off frequency of 3.1MHz. R5 and C2 forms and LPF with cut-off frequency of 48kHz. | |
| Oct 2, 2016 at 8:18 | comment | added | Araz | @IgnacioVazquez-Abrams Shown LED is drived by MCU(micro-controller) PWM signal. Then, what is your mean from "EMI from PWM"? | |
| Oct 2, 2016 at 8:05 | comment | added | Ignacio Vazquez-Abrams | Those are fairly odd places for capacitors. Maybe to reduce EMI from PWM? | |
| Oct 2, 2016 at 8:02 | history | edited | Araz | CC BY-SA 3.0 |
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| Oct 2, 2016 at 6:52 | comment | added | Rohat Kılıç | As stated above, a full schematic is required. But note that if you have an input coming from "outside world" then you should place a capacitor to protect that input. Besides, BCI (Bulk Current Injection) test is performed on any input and output coming from/going to "outside world" via a cable and I'm not sure a single capacitor would be sufficient for BCI protection. | |
| Oct 2, 2016 at 6:35 | comment | added | doug | 1nF == .001 uF, not .1 uF | |
| Oct 2, 2016 at 6:15 | history | edited | Passerby | CC BY-SA 3.0 |
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| Oct 2, 2016 at 6:11 | comment | added | Passerby | What's BCI stand for? And a full schematic is required. The context of what's driving the transistor is needed. | |
| Oct 2, 2016 at 5:11 | review | First posts | |||
| Oct 2, 2016 at 9:29 | |||||
| Oct 2, 2016 at 5:11 | history | asked | Araz | CC BY-SA 3.0 |