Timeline for Software Defined Radio hardware
Current License: CC BY-SA 3.0
8 events
| when toggle format | what | by | license | comment | |
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| Feb 7, 2017 at 1:06 | comment | added | Chris Stratton | Either the USB pipe in use can accommodate the sampler bandwidth, or it can't - if it can, you don't need an FPGA unless there are implementation quirks you need it to work around. But since you mentioned splitting hairs, most would not consider reconfigurable operations in an FPGA (if utilized) to fall outside of the "software" in "software defined radio" - rather they are just an example of optimizing the architecture of computation to the task at hand. Perhaps we might more accurately call it "computationally implemented radio" | |
| Feb 7, 2017 at 0:32 | comment | added | DrFriedParts | I know you know what you're doing. We're splitting hairs at this point. Cypress EZUSB is not fast enough for high-end SDR, that's why you see FPGA's (yes, it does other stuff too). Decimation is only necessary if your hardware or pipe isn't fast enough. If you're going to do filtering in the SDR hardware, by extension, you could just do all the filtering/processing in the FPGA and you have a conventional radio. The purpose of SDR is to (try to) do all the processing in software where it's flexible and exposed and where multiple signal chains could be executed in parallel. | |
| Feb 7, 2017 at 0:15 | comment | added | Chris Stratton |
Read the comment again. No one said there were ADCs with USB interfaces, rather that ADC data can flow directly to a USB interface chip - you only need the FPGA in between if you feel that it would be more optimal to put something other than the raw ADC samples down that pipe. You know the simple USB logic analyzers based on Cypress USB chips? A simple SDR can be an ADC feeding one of those, a more complex one puts an FPGA in between to permit hardware decimation and filtering.
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| Feb 6, 2017 at 22:23 | history | edited | DrFriedParts | CC BY-SA 3.0 |
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| Feb 6, 2017 at 22:20 | comment | added | DrFriedParts | @Chris -- I've expanded the answer, perhaps you might reconsider? (1) I've never seen an ADC, without an MCU/CPU embedded, that had a USB interface. What would be the application space for those chips? Modern FPGA based systems are architected as I've described and I've included a few product references to illustrate this point. (2) While some systems do front-end processing in the FPGA, this is an implementation liability and not the design goal of Software Defined Radio. Finally, as originally noted in the answer, this is one of the functions of the FPGA, not it's only function. | |
| Feb 5, 2017 at 21:02 | comment | added | Chris Stratton | This is mistaken. Typical FPGA-based SDR's use a USB interface chip capable of taking data directly from an ADC, possibly with a hardware FIFO in between. The point of having an FPGA is to do some pre-processing in hardware to better use the bandwidth of the older USB standards to represent the information that is of most interest, vs. just taking raw samples at the highest rate that will fit down the pipe. | |
| Dec 25, 2016 at 12:15 | vote | accept | Denis | ||
| Dec 25, 2016 at 12:10 | history | answered | DrFriedParts | CC BY-SA 3.0 |