Timeline for QFN32 exposed pad stencil
Current License: CC BY-SA 3.0
7 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Mar 14, 2017 at 0:20 | comment | added | user2233709 | I hope that someone more knowledged than me will answer you, I cannot answer for sure. But looking at blog.epectec.com/why-is-via-tenting-required-on-a-pcb they don’t say tenting is needed for such vias + on their “Quote Your PCB's Online” ad, they show a picture of a PCB with a QFN (or QFP) package with an exposed pad whose vias are not tented, while other vias are. I guess little solder paste would flow through the holes. Why do you think the chip would move more if the vias were not tented than if they were? | |
| Mar 13, 2017 at 23:09 | comment | added | jgabcgr | Are tented in order to prevent the solder flowing through themselves. Do you believe there would be no problem if there weren't tented? Wouldn't the solder paste flow through the holes? And what if the chip moved slightly during the soldering process? | |
| Mar 13, 2017 at 23:02 | comment | added | user2233709 | I don’t think you should add paste on the tented vias, as the paste won’t wet the solder mask. But I wonder why those vias are tented. That looks wrong to me. | |
| Mar 13, 2017 at 22:54 | comment | added | jgabcgr | I'm asking if my stencil opening has good paste pattern on the EP and if I could add more paste even onto the tented visas. | |
| Mar 13, 2017 at 21:39 | comment | added | user2233709 | Sorry for asking, but what is your point? I cannot guess why you feel concerned. But I guess the reason why you read that recommendation is the same reason why your stencil has this chessboard-like pattern: to ensure that there is not too much paste on the EP. | |
| Mar 13, 2017 at 20:02 | comment | added | jgabcgr | I read once that the paste on the EP mustn't be on its boundaries, and maybe that is the reason I was concerned. | |
| Mar 13, 2017 at 19:30 | history | answered | user2233709 | CC BY-SA 3.0 |