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May 26, 2017 at 16:48 vote accept eric
May 24, 2017 at 23:37 comment added eric @Anonymous Thank you for the idea, but I've checked logic levels and clocking extensively. All looks good (and in fact, the failing cards are indeed sending what I'm getting, with very clean signals).
May 24, 2017 at 23:36 answer added eric timeline score: 5
May 24, 2017 at 17:10 comment added Anonymous Post timing(scope)/simulation pictures against SPI clock. Which edge of the SPI clock you use to set control lines for SD-card? You should know that SD-card samples data at rising edge, thus the best way is to set control and data on previous clock's falling edge.
May 24, 2017 at 16:37 history asked eric CC BY-SA 3.0