Timeline for Why don't we have very high layer count PCBs (usually a maximum of 4-6 layers)?
Current License: CC BY-SA 3.0
5 events
| when toggle format | what | by | license | comment | |
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| Jul 22, 2017 at 12:02 | comment | added | The PCB Guru | @HaLailahHaZeh, I worked for a few years designing boards for ATE (Automatic Testing Equipment), and more specifically, designing boards that would be the interface between the ATE and the semiconductor that needed to be tested. In this case the board was to test a Mainframe processor which was a BGA with 3800+ balls. The reason for having that many layers was that the power consumption of this device was massive, and required multiple 2oz copper on the inner layers to resist to current peaks of 300A on each power branch. the rest was GND and 15 or so signal layers. | |
| Jul 18, 2017 at 13:00 | comment | added | Adam Davis | @HaLailahHaZeh The highest layer board I've seen was over 40 layers, and held 12 of the (at the time) highest gate count FPGAs for use in scientific computing. Huge chips with hundreds of BGA pins that all had to connect to each other and the connectors on the PCB. The PCB Guru may not be able to discuss their project further than they already have, but you can guess that the project was specialized, low volume, high budget, and had thousands of nets to route between some very large chips, probably involving FPGAs or ASICs beside some more common chips. | |
| Jul 17, 2017 at 14:45 | comment | added | HaLailah HaZeh | +1 If I may ask, what was the 56 layer board for? (Just curious.) | |
| Jul 16, 2017 at 8:03 | review | First posts | |||
| Jul 16, 2017 at 20:14 | |||||
| Jul 16, 2017 at 8:00 | history | answered | The PCB Guru | CC BY-SA 3.0 |