Timeline for GPIO Access on Cortex-M4 : Read-Modify-Write vs Atomic
Current License: CC BY-SA 3.0
4 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Oct 19, 2017 at 4:42 | comment | added | Robert Sexton | The GPIO ports that Arm licenses with the Cortex-M have a mask built into the port address, so you can do an atomic write of the port bits with a single operation. The only vendor that I'm aware of that use the Arm GPIO design is TI, although NXP does it in a similar way. Energy Micro/Silabs has ports with set/clear registers. | |
| Oct 18, 2017 at 6:39 | review | Late answers | |||
| Oct 18, 2017 at 7:21 | |||||
| Oct 18, 2017 at 6:38 | comment | added | Chris Stratton | Note that unlike address-based bit banding, the BSRR and BRR do permit multi-bit operations, as they operate with bitmasks. | |
| Oct 18, 2017 at 6:20 | history | answered | Robert Sexton | CC BY-SA 3.0 |