Timeline for MCP4921 audio: removing output DC Bias
Current License: CC BY-SA 3.0
3 events
| when toggle format | what | by | license | comment | |
|---|---|---|---|---|---|
| Nov 14, 2017 at 4:08 | comment | added | D.A.S. | Whatever, try a full scale triangle and verify signal integrity. Right now it has many issues | |
| Nov 13, 2017 at 21:30 | comment | added | user2608147 | When you say monotonic and symmetrical to Vdd, do you mean that the triangle wave should start at 0 V and peak at Vdd, and then go back down to 0 V? Assuming this is what you meant, I don't reach Vdd in my circuit because my Vref is 0.25 V on the DAC, so the waveform goes between 0 and 0.25 V? | |
| Nov 13, 2017 at 2:49 | history | answered | D.A.S. | CC BY-SA 3.0 |